Comparator circuits are well known in the electronics industry. Such circuits are used in a variety of situations for comparing a first signal with a second signal and generating an output representative of that comparison for use in numerous ways by other circuitry. For example, the output of a comparator may be used in making a decision in a circuit implementing an algorithm, checking limits in an algorithm, or generally for making any decision based upon the outcome of a comparison of two signals.
In today's environment, speed of operation of a computer is a concern to computer designers, and applies to computers of all sizes, from large mainframe computers to microprocessors employed in circuits as diverse as home appliances and automobiles.
In addition to being fast, a comparator circuit should be responsive to an acceptably wide swing of signals in order that it may be used in a wide variety of applications. Having to specifically design a given comparator circuit for a given application, as is the case with such "tailoring" of most components, adds to cost of design and construction of circuits employing those components.
Another criterion of design for any electronic circuit, including comparator circuits, is that the circuit accurately perform the function for which it is designed. Specifically, a comparator circuit must accurately produce an output representative of the true difference between signals received as inputs. The comparator circuit should not itself introduce anomalies, noise, or other sources of inaccuracy which can cause it to generate internal inaccuracies during its operation and, thus, to produce spurious outputs. Reducing noise enables the comparator circuit to be responsive to small differences between input signals and to low value signals.
All of the design criteria: wide range of applicability in accepting input signals, speed of operation, responsiveness to small signal differences and to low value signals, and accuracy of response are not necessarily compatible or mutually supportive in their effects upon the design of a comparator circuit. It is, for example, important that a comparator in its non-comparative mode not be allowed to have too wide a range of signals internally present in its comparison circuitry. Too wide a diversity of such signals slows operation in the comparison mode because a significant swing in signal value is required in order to effect an appropriate comparison. Such significant swings in value take time and may be a source of noise or other inaccuracy.
It is also desirable that components employed in any electronic circuit, including comparator circuits, be employed in their optimal operating range in order that truest response of the various components may be advantageously employed.
Certain prior art solutions to the problem of internal introduction of inaccuracies in comparator circuits have involved multiple amplifier stages which are controlled in their active-inactive periods. By such controlling, circuitry may be pre-conditioned to a stable state at the optimal operating point of the various electronic components involved before comparison is effected between the two signals to be compared. Such an approach is taken by Heller et al. in U.S. Pat. No. 4,028,558, "High Accuracy MOS Comparator"; by Hosotani et al. in U.S. Pat. No. 4,900,952, "Voltage Comparison Apparatus"; and by Fattaruso in U.S. Pat. No. 4,883,987, "Comparator Circuit Having a Fast Recovery Time". However, such solutions are relatively slow in their response and require a large number of components.
The present invention provides a stable, accurate comparator circuit which quickly reacts to changes in inputs without introduction of disruptive noise to the output.